|
A computer architecture simulator, or an architectural simulator, is a piece of software to model computer devices (or components) to predict outputs and performance metrics on a given input. An architectural simulator can model a target microprocessor only (see instruction set simulator), or an entire computer system (see full system simulator) including a processor, a memory system, and I/O devices. A full-system simulator is an architecture simulator that simulates an electronic system at such a level of detail that complete software stacks from real systems can run on the simulator without any modification. A full system simulator effectively provides virtual hardware that is independent of the nature of the host computer. The full-system model typically has to include processor cores, peripheral devices, memories, interconnection buses, and network connections. The defining property of full-system simulation compared to an instruction set simulator is that the model allows real device drivers and operating systems to be run, not just single programs. Thus, full-system simulation makes it possible to simulate individual computers and networked computer nodes with all their software, from network device drivers to operating systems, network stacks, middleware, servers, and application programs. A cycle-accurate simulator is a computer program that simulates a microarchitecture on a cycle-by-cycle basis. In contrast an instruction set simulator simulates an instruction set architecture usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precisions are very important from legacy reasons. More often CAS is used when designing new microprocessorsthey can be tested, and benchmarked accurately (including running full operating system, or compilers) without actually building a physical chip, and easily change design many times to meet expected plan. Cycle-accurate simulators must ensure that all operations are executed in the proper virtual (or real if it is possible) timebranch prediction, cache misses, fetches, pipeline stalls, thread context switching, and many other subtle aspects of microprocessors. ==Categories== Computer architecture simulators can be classified into many different categories depending on the context. * Scope: micro-architecture vs. full-system simulators. The modeled scope could be only one microprocessor or the whole computer system. * Detail: functional vs. timing (or performance) simulators. Functional simulators emphasize achieving the same function as the modeled components (what is done), while timing simulators strive to accurately reproduce the performance/timing features (when is it done) of the targets in addition to their functionalities. * Input (sometimes called Workload): trace-driven (or event-driven) vs. execution-driven simulators. Traces/Events are pre-recorded streams of instructions with some fixed input. Execution-driven simulators allow dynamic change of instructions to be executed depending on different input data. Microarchitecture Simulation is a technique for modeling the design and behavior of a microprocessor and its components. Full system simulation consist in the simulation of a complete computer system able to execute unmodified programs (it is this thus execution-driven). Such simulators are called emulator, in particular when they imitate existing (or discontinued) hardware instead of under development hardware. Instruction Set Simulator and Cycle Accurate Simulator are simulators whose scope is the simulation of a sole microprocessor. They diverge in the level of details that they provide. Instruction set simulators focus on the fast simulation of the processor functions while cycle accurate simulators aim at allowing accurate timings of the processor. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Computer architecture simulator」の詳細全文を読む スポンサード リンク
|